The present invention relates to a semiconductor memory such as a Static Random Access Memory (hereinafter referred to as a SRAM), particularly to a semiconductor memory characterized in writing data in a memory cell thereof, i.e. the semiconductor memory having word line selection circuits for selecting memory cells thereof.
The related art of the invention are disclosed in Japanese Laid-Open Publication Nos. 60-197955 and 63-177392 wherein same data can be written in all memory cells at the same time.